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Departments >> School of Engineering >> Department of Electrical-Electronic-Communication Engineering >> Chair of Electronics (Prof. Dr. Weigel) >>

  Praktikum für systematischen Entwurf programmierbarer Logikbausteine (PR PLD)

Lecturer
Dr.-Ing. Alexander Kölpin, Akad. Rat

Details
Praktikum
3 cred.h, certificate, ECTS studies, ECTS credits: 2,5, Sprache Deutsch, Anmeldung über "mein Campus"
Time and place: block seminar 4.3.2013 9:00 - 8.3.2013 17:00 , EL 4.13; comments on time and place: 1-wöchiges Blockpraktikum

Fields of study
WPF EEI-BA-AET 5-6
WPF EEI-BA-INT 5-6
WPF EEI-BA-MIK 5-6
WPF EEI-MA-AET 1-4
WPF EEI-MA-INT 1-4
WPF EEI-MA-MIK 1-4
WPF ME-MA-P 1-4
WPF WING-BA-IKS-ING-P 5-6
WPF WING-MA 1-4
WPF IuK-BA-S 4-7

Prerequisites / Organisational information
Vorkenntnisse: Grundlagen digitaler Schaltungen

Contents
  • Schaltungen: 7-Segment-Decoder, Multiplexer, Zähler
  • Eingabe: Fuse-map, VHDL, Zustandsdiagramm, Schaltplan, Bibliothek

  • Bausteine: PLDs, FPGAs

  • Versuchsinhalte: Schaltnetze, Multiplex-Anzeige, Stoppuhr

  • In System Programming (isp)

Recommended literature
Tietze/Schenk: Halbleiter-Schaltungstechnik, Springer Verlag

ECTS information:
Title:
Practical Course for Systematic Design with Programmable Logic Devices (PLD)

Credits: 2,5

Prerequisites
Basics in digital circuits and logic

Contents
  • Circuits: 7 segment display, multiplexer, counter
  • Input: fuse map, VHDL, state diagram, schematic, library

  • Devices: PLDs, FPGAs

  • Chapters: combinatorial circuits, sequential circuits, multiplexing display, stop watch

  • In system programming (ISP)

Literature
Tietze/Schenk: Halbleiter-Schaltungstechnik, Springer Verlag

Additional information
Keywords: Digitale Schaltungen, Schaltnetze, Schaltwerke, PLD, FPGA, VHDL, Altera, Simulation
Expected participants: 20, Maximale Teilnehmerzahl: 20
Registration is required for this lecture.
Registration starts on Monday, 23.7.2012 and lasts till Friday, 1.3.2013 über: mein Campus.

Verwendung in folgenden UnivIS-Modulen
Startsemester WS 2012/2013:
Praktikum für systematischen Entwurf programmierbarer Logikbausteine (PR PLD)

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